Custom SOC/IP Verification Engineer

Role Summary

NVIDIA is in search of a Custom SOC/IP Verification Engineer responsible for verifying next-generation SoC and IP solutions. This position focuses on ensuring cache coherency and compliance across CPU and GPU memory subsystems within high-performance ASIC designs.

Experience Level

Applicants should have a minimum of 8 years of hands-on experience in ASIC verification, specifically related to cache coherency and memory subsystem verification.

Responsibilities

The responsibilities include:

• Verifying various processing blocks within an SOC, with an emphasis on cache coherency protocols and memory hierarchies.
• Creating test plans for verifying cache coherency in ASIC-based SoCs using UVM environments.
• Designing and implementing System Verilog testbenches for multi-level cache hierarchies and interconnect fabric.
• Collaborating with multiple teams to ensure effective verification plans and execution.
• Developing verification strategies and methodologies across silicon and platform levels.

Requirements

Candidates should possess:

• B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related field.
• Strong knowledge of System Verilog and UVM method.
• Experience with AMBA protocols (AXI, ACE, CHI) and familiarity with SoC architectures and CPU-cache interactions.
• Proficiency in scripting languages such as Python, Perl, TCL, and a working knowledge of C/C++.

Education Requirements

B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field, or equivalent experience.