Custom HBM Architecture and Design Engineer

Job Title

Custom HBM Architecture and Design Engineer

Role Summary

The Custom HBM Architecture and Design Engineer will design and integrate SoC logic die for HBM-based products within the Heterogeneous Integration Group (HIG). This hands-on role involves architecture, RTL implementation, IP integration, pre-/post-silicon support, and cross-functional collaboration with verification, physical design, firmware, and product teams.

Experience Level

Senior — the position requires substantial industry experience; the posting specifies a minimum of 10 years of relevant experience.

Responsibilities

Primary responsibilities focus on architecture, RTL design, integration, and silicon bring-up for HBM logic die.

• Analyze system-level hardware/software interaction and identify performance bottlenecks for AI/ML workloads on HBM-based hardware.
• Define and drive HBM SoC architecture, propose improvements, and implement proof-of-concept designs.
• Architect, design, and deliver RTL for SoC-level blocks and subsystems.
• Design memory subsystems: select and integrate memory IP, buses/protocols, and optimize power/performance/area.
• Integrate internal and third-party IP (controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY-adjacent logic).
• Participate in SoC integration tasks including clocking, reset, power intent, and configuration infrastructure.
• Support pre-silicon validation and post-silicon bring-up, including root-cause analysis and debugging.
• Produce design documentation, block specifications, and participate in design reviews.
• Collaborate with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure manufacturable builds.

Requirements

Must-have technical skills and experience.

• Minimum of 10 years of relevant industry experience.
• Proficiency in SystemVerilog/Verilog and SoC integration methodologies.
• Experience with RTL-to-GDSII flow, including synthesis and static timing analysis.
• Familiarity with EDA tools (Cadence, Synopsys, and/or Siemens).
• Programming/scripting experience (Python, TCL, Perl, or shell scripting).
• Experience with SoC-level integration (clocking, resets, power intent) and IP integration/debug.
• Experience with pre-silicon validation and post-silicon root-cause analysis.

Nice-to-have:

• Experience with HBM, DRAM, or memory-centric SoC designs.
• Familiarity with high-speed interfaces, reset architectures, and power management concepts.
• Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug methodologies.
• Experience with hardware emulation/acceleration platforms (e.g., Palladium, Veloce, Zebu).

Education Requirements

Bachelor's or master’s degree in Electrical Engineering, Computer Engineering, or a related field is required (specified by the employer). The posting pairs the degree requirement with a minimum of 10 years of related experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.