The Associate Principal Product Engineer focuses on the integration and support of the Aprisa place and route tools within various semiconductor designs. The position requires collaboration with leading semiconductor foundries and research and development teams to ensure the successful deployment of IC products.
This role involves technical contributions in the IC design sector, specifically engaging in advanced process tech and physical design. The engineer will define PnR flow with Aprisa tools and work closely with internal and external stakeholders to address challenges related to semiconductor manufacturing.
The ideal candidate will have between 5 to 15 years of relevant experience in Physical Design, particularly with mainstream place and route tools.
Applicants should have hands-on experience in physical design processes including floorplanning, placement, clock tree synthesis, and routing. Proficiency with commercial tools such as Synopsys and Cadence is required. Familiarity with scripting languages like TCL, Perl, or Python is beneficial. Strong problem-solving skills and effective communication abilities are essential.
A background in Engineering or a related technical field is preferred, typically with a Bachelor's or Master's degree.