ASIC Verification- Staff Engineer

Role Summary

The ASIC Verification Staff Engineer will be working alongside a team of engineers to develop and implement verification methodologies for ASIC designs.

Experience Level

This role requires a senior level of experience in ASIC verification and design, including a strong understanding of the verification process.

Responsibilities

• Develop and execute verification plans for ASIC designs.
• Implement and maintain verification environments and toolchains.
• Collaborate with design teams to ensure proper integration and verification of components.
• Identify and track verification issues, and provide status reports to project leads.
• Mentor junior engineers and assist with their professional growth.

Requirements

• Bachelor’s degree in Electrical Engineering or related field.
• 5+ years of experience in ASIC design and verification.
• Proficiency in SystemVerilog, UVM, and other verification methodologies.
• Ability to work collaboratively in a team environment.
• Strong problem-solving skills and attention to detail.

Education Requirements

Bachelor’s degree in Electrical Engineering or a related field.