ASIC Verification Engineer

Job Title

ASIC Verification Engineer

Role Summary

Join the HPE Networking silicon team to own block- and subsystem-level verification for high-speed networking ASICs used in routers and switches. This hybrid role is based in Durham, NC and expects on-site presence about 2 days per week.

The role focuses on building and maintaining UVM-based verification environments, executing constraint-driven random tests, debugging complex SoC behavior, and driving coverage closure to deliver production-quality silicon.

Experience Level

Mid-level — typically 3+ years of ASIC/SoC verification experience is expected.

Responsibilities

Primary responsibilities include ownership of verification efforts from planning through coverage closure and close collaboration with design and validation teams.

• Create and execute block/subsystem verification plans and achieve coverage closure.
• Develop, extend, and maintain UVM verification environments, agents, sequences, scoreboards, virtual sequences, and register models.
• Design constraint-driven random tests, functional coverage, and assertions (SVA).
• Analyze simulation results and debug waveforms using tools such as Cadence Xcelium, Synopsys VCS, or Mentor Questa.
• Collaborate with cross-functional teams to triage and resolve functional issues and support overall SoC delivery.
• Contribute to regression flows, coverage analysis, and verification infrastructure improvements.

Requirements

Required technical skills and proven experience to perform the role.

• 3+ years of ASIC/SoC verification experience with ownership from test plan to coverage closure.
• Proficiency in SystemVerilog and UVM; experience developing environments from scratch.
• Strong knowledge of randomization, constraints, functional coverage, and assertions (SVA).
• Experience in test planning, coverage analysis, and debugging complex SoC designs.
• Hands-on use of industry simulation tools (Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.

• Experience with networking ASICs (packet processing, forwarding engines, fabric interfaces) or router datapath/control blocks.
• Familiarity with high-speed interconnects, buffers, scheduling pipelines, emulation/hardware acceleration, or traffic-model integration.
• Exposure to coverage analytics, regression dashboards, CI flows (e.g., Jenkins), UPF/low-power, formal verification, or post-silicon bring-up.

Education Requirements

Not specified.

About the Company

Company: Hewlett Packard Enterprise

Headquarters: Spring, TX, United States

Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.