Role Summary
As an ASIC/SoC Design Engineer, you will be a core member of the Silicon Design team at Advanced Micro Devices, responsible for leading the RTL design lifecycle for complex IPs tailored for next-generation embedded products. This role requires a comprehensive understanding of the complete design process, from micro-architecture specification through to the delivery of production silicon.
Experience Level
This position is aimed at Level - Senior candidates with an established track record in ASIC design, demonstrating expert knowledge through successful product tape-outs.
Responsibilities
Your main responsibilities will include:
- Creating and authoring detailed micro-architecture specifications along with managing the Verilog RTL implementation of major IP blocks.
- Leading the full ASIC development lifecycle, covering specification, RTL coding, lint checks, synthesis, and post-silicon validation.
- Engaging in timing closure efforts through static timing analysis and collaborating with physical design teams.
- Integrating ASIC IP blocks into full-chip SOC environments, ensuring compliance with industry standards.
- Collaborating with verification teams to guarantee functional coverage and implementing DFT/DFD features.
- Developing scripts in Python/Perl/Tcl to enhance workflow automation and efficiency.
- Driving cross-functional collaborations to resolve technical challenges ensuring timely delivery of silicon.
Requirements
The following qualifications are required for this position:
- A minimum of two production ASIC tape-outs in senior roles.
- Expertise in Verilog RTL coding and a thorough understanding of the ASIC design process.
- Hands-on experience writing and debugging SDC timing constraints, as well as integrating complex IP blocks into SoC designs.
- Knowledge of on-chip interconnect protocols, particularly AMBA.
Education Requirements
A Bachelor's or Master's degree in Electrical Engineering or Computer Engineering is required for this role.