ASIC Physical Design Staff Engineer
SynopsysRole Summary
The ASIC Physical Design Staff Engineer will be responsible for implementing and integrating advanced IP solutions, focusing on performance and quality for DDR, HBM, and HBI technologies.
Experience Level
Senior, with a minimum of 6 years of experience in ASIC physical design.
Responsibilities
Main responsibilities include:
- Implementing and integrating DDR, HBM, and HBI IP at advanced technology nodes.
- Driving timing closure efforts for complex designs.
- Designing and optimizing clock trees.
- Collaborating with local and US counterparts.
- Leading project tasks independently and mentoring junior engineers.
Requirements
Candidates must meet the following:
- Minimum 6 years of experience in ASIC physical design.
- Expertise in tools such as Design Compiler, IC Compiler II, PrimeTime SI, and Formality.
- Experience with DDR/HBM/HBI timing closure and IP integration.
- Strong analytical and problem-solving skills.
- Ability to lead project tasks and mentor junior team members.
Education Requirements
Post-graduate qualifications are preferred but not strictly specified.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
