The ASIC Physical Design, Sr Engineer is responsible for the physical design implementation of ASICs, which includes floor planning, placement, clock tree synthesis, and timing closure. The role involves working closely with RTL designers and design verification engineers to ensure that the physical design meets all specifications and design rules.
This position is categorized as Level - Senior, requiring significant experience in ASIC physical design methodologies.
Applicants are expected to have a strong background in digital design and ASIC physical design tools.
A Bachelor's or Master's degree in Electrical Engineering or related field is required.