The ASIC Physical Design Senior Engineer is responsible for implementing and integrating advanced DDR IPs for next-generation silicon technology. This role involves collaborating with both local and US-based teams to ensure successful project delivery within high-performance requirements.
Senior; requires 3+ years of experience in ASIC physical design, particularly with advanced technology nodes (10nm, 7nm, 6nm, or below).
The successful candidate will:
Qualifications include:
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or related field.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
