ASIC Physical Design Engineer - Principal
SynopsysJob Title
ASIC Physical Design Engineer - Principal
Role Summary
The ASIC Physical Design Engineer - Principal will lead complex SoC or test chip implementations at advanced technology nodes. The role involves overseeing the complete physical design flow, collaborating across teams, and enhancing the quality and reliability of silicon chips.
Experience Level
Senior; requires 12+ years of experience in ASIC physical design.
Responsibilities
Key responsibilities include:
- Overseeing physical implementation for DDR/HBM/UCIe test chips.
- Developing floorplans and power strategies for multiple foundry nodes.
- Driving RTL-to-GDSII flow while ensuring area, power, and performance goals.
- Executing static timing analysis and signoff.
- Conducting EM/IR drop and physical verification checks.
- Integrating IP blocks and hard macros, and collaborating with cross-functional teams.
Requirements
Must-have qualifications include:
- 12+ years in ASIC physical design at advanced nodes.
- Expertise in floorplanning, synthesis, place & route, timing closure, and verification.
- Experience with tools like DC, PT, ICC2/FC, ICV, Calibre, RedHawk, and FinFet.
- Strong communication and project leadership skills.
- Authorization to work in the USA.
Education Requirements
Not specified.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
