ASIC Physical Design Engineer
Work on physical design from RTL to GDSII focusing on timing closure, synthesis, constraint development, partitioning, and related flows. The role collaborates with P&R, DFT, SI, architecture and other teams to drive physical-friendly design and support advanced process technologies.
Entry-level / Junior (preferred) β 1+ year of relevant IC implementation or physical design experience is preferred. The team hires across experience levels.
Deliver and improve physical-design flows and achieve timing closure at block and full-chip levels.
Key skills and preferred qualifications.
MS in Electrical Engineering, Computer Science, or Microelectronics preferred; 1+ year of relevant experience preferred. Relevant coursework includes circuit design and digital design. No explicit mention of acceptable equivalent-experience language was provided.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
