ASIC DV Engineer, Simulation Acceleration and Hybrid Verification

Job Title

ASIC DV Engineer, Simulation Acceleration and Hybrid Verification

Role Summary

Join the Infrastructure organization to design and deliver simulation-acceleration and hybrid verification solutions for ASIC IP and SoC used in Meta data-center systems. You will lead hybrid-emulation verification efforts from test planning through verification closure and collaborate with architecture, design, emulation, software and post-silicon teams.

Experience Level

Mid-level — role expects experienced engineers; posting specifies 6+ years of relevant experience.

Responsibilities

Primary responsibilities focus on defining and executing hybrid verification methodology, building scalable verification environments, and driving verification closure for cluster- and SoC-level designs.

• Define and promote simulation-acceleration and hybrid verification methodologies across cluster and SoC levels.
• Work with architecture and design teams to create functional, use-case, and performance test plans for the DUT.
• Create verification scope, environments and testplans; execute targeted tests to close functional and performance scenarios.
• Debug, root-cause and resolve functional failures in collaboration with design teams.
• Build reusable, scalable hybrid verification environments and evaluate solutions for simulation acceleration.
• Drive continuous improvements to hybrid verification flows, tools and infrastructure.
• Provide training and mentor engineers on hybrid verification methodologies.

Requirements

Concise list of required skills and desirable skills. Education details are summarized separately under Education Requirements.

• Must-have:
  • 6+ years of relevant ASIC verification experience.
  • Hands-on experience with Verilog, SystemVerilog and UVM; C/C++ and Python for verification.
  • Experience with emulation/hardware acceleration platforms such as Zebu, Palladium or Veloce.
  • Experience in cluster- and SoC-level verification using hybrid simulation/emulation methodologies.
  • Proficiency in scripting (Python, Perl, or TCL) to build tools and verification flows.
  • Experience architecting and implementing hybrid verification infrastructure and executing verification cycles.
• Nice-to-have:
  • Experience with revision control systems (Mercurial, Git, SVN) and fully automated data/analysis flows.
  • Verification experience with ARM or RISC-V subsystems and high-speed interfaces (Ethernet, PCIe, DDR, HBM).
  • Background in performance verification for compute blocks (CPU, GPU, HW accelerators) and datacenter workloads (video, AI/ML, networking).
  • Experience with simulators, waveform debugging tools and developing hybrid environments from scratch.
  • Proven track record of first-pass silicon success and cross-functional collaboration with emulation and post-silicon teams.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering or a relevant technical field, or equivalent practical experience. (The posting explicitly allows equivalent practical experience in lieu of a degree.)

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.