ASIC Digital Design, Sr Staff Engineer - Processor RTL Design
SynopsysJob Title
ASIC Digital Design, Sr Staff Engineer - Processor RTL Design
Role Summary
The ASIC Digital Design, Sr Staff Engineer is responsible for designing and implementing processor RTL using advanced digital design techniques. The role involves working collaboratively within the engineering team to develop high-performance digital solutions.
Experience Level
Senior level position, relevant experience in the field is expected.
Responsibilities
The key responsibilities include:
- Design and develop processor RTL
- Optimize digital design for performance and power
- Conduct design reviews and verification
- Collaborate with cross-functional teams on design requirements
- Mentor junior engineers in design processes
Requirements
Must-have skills and qualifications:
- Extensive experience in digital design and RTL coding
- Proficiency in Verilog or VHDL
- Strong understanding of processor architectures
- Experience with simulation tools and methodologies
- Ability to work in a collaborative team environment
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field is expected.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
