ASIC Digital Design Sr. Staff Engineer
SynopsysJob Title
ASIC Digital Design Sr. Staff Engineer
Role Summary
Lead the architecture and implementation of high-performance RTL designs for advanced IP cores, focused on die-to-die and high-speed communication protocols for consumer and automotive applications. Work within the Design Ware IP R&D team at the Hyderabad Design Center, partnering with verification, physical design, and global sites to deliver production-quality IP.
Experience Level
Senior - requires an experienced engineer; posting specifies 12+ years of relevant ASIC digital design experience.
Responsibilities
Primary responsibilities include technical leadership across architecture, RTL implementation, and delivery of IP cores.
- Architect and define micro-architectures from functional specifications for complex IP blocks (die-to-die and high-speed protocols).
- Implement RTL (Verilog/SystemVerilog), perform synthesis, CDC analysis, static timing analysis, and debug designs.
- Create architecture and micro-architecture documentation and translate functional specs into detailed design solutions.
- Collaborate with verification to plan and execute verification cycles and achieve closure with required coverage.
- Work with customers to clarify specifications and ensure design alignment with product needs.
- Mentor and technically lead designers across multi-site teams, driving design quality and process adherence.
Requirements
Must-have technical skills and experience.
- Proven expertise in micro-architecture and RTL coding using Verilog/SystemVerilog.
- Hands-on experience with synthesis, CDC analysis, formal checking, and static timing analysis.
- Familiarity with high-speed design considerations and P&R-aware synthesis; experience with tools such as Fusion Compiler.
- Experience with industry protocols such as Ethernet, DDR, PCIe/CXL, USB, MPHY, UFS, UNIPRO, UCIe, or other die-to-die communication protocols.
- Use of revision control systems (example: Perforce) and scripting for automation (Perl, Shell, or similar).
- Proven track record of technical leadership, mentoring, and working in global, multi-site environments.
- Exposure to IP design quality processes and verification-driven development.
Education Requirements
Bachelor of Science in Electrical Engineering (BSEE) or Master of Science in Electrical Engineering (MSEE) is specified. The posting also indicates 12+ years of industry experience in ASIC digital design.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
