ASIC Digital Design Engineer

Job Title

ASIC Digital Design Engineer

Role Summary

Work on digital ASIC design and implementation as part of the ASIC Digital Design team based in Boxborough. The role focuses on developing RTL, collaborating with verification and physical-design teams, and delivering silicon-ready digital blocks.

Experience Level

Mid-level. Years of experience not specified.

Responsibilities

Typical responsibilities for this role include:

• Develop and maintain RTL (Verilog/SystemVerilog) for digital ASIC blocks.
• Collaborate with verification, synthesis, and physical-design teams to meet functional, timing, and area goals.
• Participate in design reviews, code reviews, and integration activities.
• Support bring-up, debug, and silicon validation activities as required.

Requirements

Key qualifications and skills (not explicitly listed in source; common expectations summarized):

• Practical experience with RTL design and common ASIC flows (synthesis, static timing analysis, timing closure).
• Familiarity with hardware verification practices and collaboration with verification engineers.
• Ability to work onsite with cross-functional teams in Boxborough, MA.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.