ASIC Digital Design Architect

Role Summary

An experienced and visionary ASIC Digital Architect, responsible for driving the future of semiconductor technology by defining and executing complex digital designs and protocols.

Experience Level

Level - Senior

Responsibilities

• Defining and developing ASIC RTL design and verification at both chip and block levels.
• Creating and executing design plans for complex digital designs, particularly focusing on DDR, PCIe, CXL, UAL, UCIe IO protocols.
• Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
• Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
• Communicating with internal and external stakeholders to align on project goals and deliverables.

Requirements

• Extensive experience in ASIC RTL design.
• In-depth knowledge of DDR, PCIe, UAL, UCIe and similar I/O protocols and their applications.
• Proficiency in advanced digital design tools and methodologies.
• Strong problem-solving skills and the ability to work independently.
• Excellent communication skills for effective collaboration with diverse teams.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Science, or a related field is preferred, along with industry experience in ASIC digital architecture.