ASIC Digital Design Architect

Role Summary

An experienced and visionary ASIC Digital Architect, responsible for driving semiconductor technology advancements through the development of innovative design solutions.

Experience Level

Senior

Responsibilities

• Defining and developing ASIC RTL design and verification at both chip and block levels.
• Creating and executing design plans for complex digital designs, with a focus on DDR, PCIe, CXL, UAL, and UCIe IO protocols.
• Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
• Mentoring junior engineers, promoting best practices, and fostering a culture of continuous improvement.
• Communicating with internal and external stakeholders to align on project goals and deliverables.

Requirements

• Extensive experience in ASIC RTL design.
• In-depth knowledge of DDR, PCIe, UAL, UCIe and similar IO protocols.
• Proficiency in advanced digital design tools and methodologies.
• Strong problem-solving skills and the ability to work independently.
• Excellent communication skills for effective collaboration with diverse teams.

Education Requirements

Education requirements are not explicitly stated; candidates are encouraged to apply based on relevant experience and expertise.