ASIC DFT Engineer II

Job Title

ASIC DFT Engineer II

Role Summary

Join the Silicon One ASIC development organization to design and integrate Design-for-Test (DFT) features for high-performance networking chips. The role partners with frontend RTL, design verification, and backend physical teams to enable testability, debug, and post-silicon validation.

Experience Level

Mid-level (Engineer II). Typical background: 2+ years experience for candidates with a Bachelor's; 0+ years with a relevant Master’s per Cisco minimums.

Responsibilities

Primary responsibilities focus on DFT implementation, automation, and cross-team integration throughout the design cycle.

• Implement hardware DFT features supporting ATE, in-system test, debug, and diagnostics.
• Develop and enhance automation scripts to improve implementation robustness and efficiency.
• Collaborate with RTL, design verification, and physical design teams to integrate and validate test logic during implementation and post-silicon flows.
• Validate test timing and logic equivalency using SystemVerilog.
• Use ATPG and EDA tools (e.g., TestMax, Tetramax, Tessent, PrimeTime) for test pattern generation and analysis.
• Perform gate-level simulation and debug with commercial simulators (e.g., VCS).

Requirements

Must-have technical skills and practical exposures required for the role.

• Foundational understanding or internship-level exposure to JTAG protocols, scan architectures, and BIST (memory BIST and boundary scan).
• Familiarity or introductory hands-on exposure to ATPG and EDA tool flows; scripting skills in Python, Tcl, or Perl.
• Experience with gate-level simulation and debugging (simulators such as VCS).
• Strong communication skills to coordinate across RTL, verification, and physical design teams.
• Nice-to-have: practical verification experience with SystemVerilog, logic equivalency checking, test-timing validation, post-silicon validation using DFT patterns, and static timing analysis.
• Nice-to-have: understanding of basic VLSI physical behaviors (electromigration, temperature/voltage variation) and timing concepts (setup/hold, metastability).

Education Requirements

One of the following completed within the past 3 years or expected within 12 months: Master's degree (0 years experience) OR Bachelor's degree (2 years experience). Qualifying education and experience should be in ASIC engineering or a related field.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).