ASIC Design Verification Lead

Job Title

ASIC Design Verification Lead

Role Summary

Eridu AI, a Silicon Valley-based hardware startup, focuses on innovative infrastructure solutions to enhance AI model performance. The ASIC Design Verification Lead will define verification strategies and oversee development processes for ASIC designs.

Experience Level

Senior; candidates should have considerable hands-on experience in ASIC design verification.

Responsibilities

The role includes the following key responsibilities:

• Define and own verification strategies at block, subsystem, and chip levels.
• Develop scalable verification environments using SystemVerilog and UVM.
• Drive execution from test-plan definition through coverage and bug closure.
• Ensure verification readiness for tape-out.
• Write and review high-quality testbenches and test sequences.
• Collaborate with RTL, architecture, physical design, and firmware teams.
• Lead full-chip verification planning and execution.
• Continuously improve verification methodologies.

Requirements

Must-have qualifications include:

• Strong hands-on experience in ASIC design verification.
• Proven track record of successful ASIC tape-out.
• Expertise in SystemVerilog and UVM methodologies.
• Strong understanding of simulation and debug processes.
• Effective communication skills for collaborative work.

Education Requirements

Not specified.

About the Company

Company: AnySilicon

Headquarters: Austin, Texas, United States

AnySilicon is a comprehensive platform offering semiconductor design resources, services, and support for professionals in the semiconductor industry. It serves as a marketplace for ASIC services and IP cores, connecting customers with vendors while providing valuable insights and news about the semiconductor ecosystem. With a focus on enhancing efficiency and fostering innovation, AnySilicon accelerates the prototyping and development of electronic designs.