ASIC Design/Verification Architect

Job Title

ASIC Design/Verification Architect

Role Summary

Senior technical lead responsible for ASIC digital design and verification architecture. The role partners with RTL, IP, and product teams to define verification strategy, architecture decisions, and design-for-test considerations for complex ASIC projects.

The position is based in Reading, United Kingdom and focuses on producing robust, verifiable RTL and verification environments that meet performance, area, and schedule targets.

Experience Level

Senior — typically 8+ years of experience in ASIC digital design and verification or equivalent industry experience.

Responsibilities

Core responsibilities include technical leadership, verification strategy, and cross-team coordination.

• Define and own verification architecture and strategy for ASIC projects.
• Develop or guide development of SystemVerilog/UVM testbenches and verification environments.
• Perform design and verification reviews; identify risks and mitigation plans.
• Collaborate with RTL, IP, physical design, and software teams to ensure integration and deliverables.
• Establish verification plans, metrics, and coverage goals; track progress to closure.
• Mentor and provide technical guidance to engineers and verification teams.
• Support synthesis, timing, and DFT trade-offs relevant to verification goals.
• Drive adoption of automation, scripting, and EDA tool best practices to improve productivity.

Requirements

Must-have technical skills and practical experience; followed by desirable skills.

• Must-have: Significant hands-on ASIC digital design and verification experience.
• Must-have: Proficiency with RTL (SystemVerilog) and common verification methodologies (UVM, constrained-random).
• Must-have: Experience with verification planning, coverage-driven verification, and common EDA simulation tools.
• Must-have: Strong debugging skills, scripting ability (Perl/Python/Tcl or similar), and familiarity with simulation/synthesis flows.
• Nice-to-have: Experience with low-power design, DFT, formal verification, or physical design interactions.
• Nice-to-have: Prior experience in architect or lead roles and mentoring teams.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.