ASIC Design for Test (DFT) Engineer

Job Title

ASIC Design for Test (DFT) Engineer

Role Summary

Work as part of a customer-facing ASIC team to architect and implement Design-for-Test (DFT) structures for block- and chip-level ASIC designs. The role focuses on test architecture, pattern generation and validation, test timing, and measuring test coverage.

Expected base pay: $100,000 - $165,000 USD (annual). Applications accepted through 2026-05-27.

Experience Level

Mid-level — typically requires 5+ years of relevant ASIC engineering experience.

Responsibilities

The primary responsibilities focus on DFT architecture and validation across block and full-chip flows.

• Design and implement DFT structures (scan chains, compression, MBIST, boundary-scan elements) at block and chip level.
• Develop and validate test timing constraints and ensure test timing closure with static timing analysis.
• Generate test patterns and validate them with logic simulation; measure and report test coverage metrics.
• Integrate DFT structures with SOC design flows and 3rd-party test IP where required.
• Collaborate with cross-functional teams and customers to meet testability and quality targets.

Requirements

Must-have technical skills and eligibility requirements.

• Minimum 5 years of ASIC engineering experience focused on digital design and DFT.
• Practical experience with DFT concepts: scan, scan compression, MBIST, BSCAN, and macro test development.
• Experience using internal and commercial DFT tools and flows.
• Experience applying Static Timing Analysis to validate test timing requirements.
• Experience with logic simulation tools to validate generated test patterns.
• Strong interpersonal and written/verbal communication skills for customer-facing work.
• This role will involve compliance with ITAR; applicants must be U.S. Citizens or U.S. Permanent Residents.

Preferred / nice-to-have:

• Experience with System-on-Chip (SoC) designs (ARM-based SOCs).
• Experience architecting DFT for large-scale ASICs.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering is specified (with coursework in digital/microprocessor design, computer architecture, VLSI design, and programming). Equivalent practical experience may be considered.

About the Company

Company: Asic North

Headquarters: Williston, VT, USA

ASIC North provides ASIC and semiconductor design engineering services to high‑tech companies, specializing in ASIC design, verification, and design-for-test (DFT). The firm offers consulting and engineering placements, supporting system-on-chip development and emphasizing employee benefits and flexible work arrangements.