ASIC Design Engineer, Clocks
The GPU Clocks team architects, designs and validates on-chip clocking for NVIDIA GPUs, working across frontend architecture, backend physical teams, verification, timing and DFT groups.
This role focuses on RTL design and netlist-quality of clocking logic, enhancing in-house flows, and debugging clock-related silicon issues with software and silicon solution teams.
Entry-level β requires at least 2 years of relevant work experience; role may suit early-career engineers with practical ASIC RTL and verification background.
Core responsibilities include design, validation and cross-team delivery of GPU clocking logic and related flows.
Must-have technical skills and experience; nice-to-have items listed separately.
BS in Electrical Engineering required, MS preferred, or equivalent practical experience in a related technical field (electrical/computer engineering, computer science, physics, or equivalent).
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
