ASIC Design Engineer

Role Summary

The ASIC Design Engineer will join the Lattice HW design group to work on one or multiple areas of ASIC design. This position involves collaboration with cross-functional teams and provides opportunities for learning and contribution in RTL design, verification, physical design, and methodology development.

Experience Level

Entry-level.

Responsibilities

The incumbent will:

• Work on various aspects of ASIC design.
• Assist in RTL design, verification, physical design, and timing signoff.
• Utilize scripting knowledge (Perl/Python) to enhance design efficiency.
• Collaborate with teams across different functions including design, DFT, PNR, and verification.
• Develop strong relationships with worldwide teams.

Requirements

Applicants should possess:

• BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science, or equivalent.
• Knowledge of digital design, CMOS technology, and basic electronics.
• Familiarity with RTL coding (Verilog/VHDL) and ASIC design implementation flow is advantageous.
• Experience with industry-standard tools like Cadence and Synopsys is helpful.
• Willingness to work with multiple groups across different sites and time zones.

Education Requirements

BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science, or equivalent.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.