Application Engineer Manager – Formal Verification and Functional Simulation

Job Title

Application Engineer Manager – Formal Verification and Functional Simulation

Role Summary

Manager-level technical role on the Customer Success Team (CST) based in Belo Horizonte, Brazil. The role focuses on helping customers adopt and scale Formal Verification and Functional Simulation flows, providing technical leadership across evaluations, deployments, and production engagements.

Works closely with customers, R&D, Product Engineering, Sales, and worldwide AE teams to drive product improvements, verification methodologies, automation, and high-impact technical content.

Experience Level

Senior — manager-level role. Posting indicates experience mentoring or leading a small to mid-size engineering team; no specific years-of-experience requirement provided.

Responsibilities

Primary responsibilities involve customer-facing technical support, methodology leadership, and collaboration with product teams.

• Provide technical support and debugging for Formal Verification and Functional Simulation customers, including hybrid formal+simulation methodologies.
• Act as trusted technical advisor for formal and simulation verification topics and drive verification strategy and best practices.
• Collaborate with R&D and Product Engineering to identify and prioritize product improvements based on customer feedback and verification analysis.
• Create technical content: knowledge articles, adoption kits, best-practice guides, and verification methodology documentation.
• Mentor and develop AE engineers, promote global knowledge sharing, and coordinate with worldwide AE teams.
• Partner with Sales and technical account teams to plan and execute account support and technical engagements.
• Deliver technical solutions using tool capabilities, methodology optimization, automation, and scripting; analyze complex customer issues and coordinate CCRs for R&D resolution.
• Deploy and promote ML/AI-assisted verification approaches to improve productivity, coverage, and debug efficiency.

Requirements

Key must-have technical skills and customer-facing capabilities. Education details moved to the Education Requirements section below.

• Must-have: Deep practical expertise in Formal Verification (e.g., Jasper, FPV, CDC, connectivity, low-power) or Functional Simulation (Xcelium, UVM-based flows, coverage, regressions) and experience integrating formal with simulation flows.
• Must-have: Solid understanding of assertion-based verification, coverage metrics, verification sign-off criteria, and debug methodologies; strong debugging and problem-isolation skills.
• Must-have: Experience working directly with customers in technically complex engagements and delivering high-quality support across evaluation, deployment, and production phases.
• Nice-to-have: Scripting and flow automation skills (Tcl, Python, Perl, shell) and experience deploying automation and tooling improvements.
• Nice-to-have: Experience leading or mentoring a small to mid-size engineering team and delivering technical enablement materials.
• Nice-to-have: Familiarity with ML/AI-assisted verification tools and methodologies.

Education Requirements

Complete Bachelor’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related field (as stated in the posting).

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.