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Application Engineer – AI & Verification Solutions

Cadence Design Systems
August 09, 2026
Full-time
On-site
Petah Tikva, Israel
Verification Jobs, Level - Senior

Job Title

Application Engineer – AI & Verification Solutions

Role Summary

Customer-facing application engineering role on the Verification Solutions team supporting a strategic semiconductor customer. The role focuses on deploying, optimizing, and driving adoption of Cadence verification technologies including simulation, low-power verification, AI-driven verification workflows, and verification automation.

You will work directly with customer design and verification teams and collaborate with Cadence R&D, product management, and solutions teams to resolve technical issues and influence product direction.

Experience Level

Senior level. Requires approximately 8+ years of experience in semiconductor design, verification, or EDA applications engineering.

Responsibilities

Provide technical support, deployment, and enablement for advanced verification flows at a customer site.

  • Deploy and support Cadence verification platforms (simulation, low-power, AI-driven workflows).
  • Troubleshoot and resolve complex customer technical issues in verification environments.
  • Optimize verification environments based on Xcelium and related platforms.
  • Drive adoption of low-power verification (UPF/CPF), coverage and debug technologies, and verification automation.
  • Develop and deliver technical presentations, workshops, and training for customer teams.
  • Collaborate with Cadence R&D to investigate issues and influence product enhancements.
  • Participate in proof-of-concepts, benchmarking, and technology evaluations.

Requirements

Must-have technical skills and professional experience.

  • 8+ years in semiconductor design, verification, or EDA applications engineering.
  • Strong understanding of digital design and verification methodologies.
  • Hands-on experience with SystemVerilog and UVM-based verification environments.
  • Experience debugging complex hardware designs and verification environments.
  • Knowledge of low-power verification concepts and power-aware verification practices (UPF/CPF preferred).
  • Strong analytical and problem-solving skills; ability to diagnose root causes in complex flows.
  • Excellent written and verbal communication; experienced in customer-facing roles.
  • Ability to work independently and collaborate across geographically distributed teams.
  • Fluent English communication skills.

Preferred:

  • Experience with Cadence Xcelium and Verisium platforms.
  • Scripting experience (Python, Perl, Tcl, Shell).
  • Familiarity with AI and machine learning applications in verification.

Education Requirements

B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-09