Analog Methodology Architect and AI Enthusiast

Job Title

Analog Methodology Architect and AI Enthusiast

Role Summary

Lead methodology development and adoption for analog and adjacent-domain workflows within the Analog Integration Team (AIT). Focus areas include circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration, and methodology integration for application-optimized IP and special-purpose silicon.

Work cross-functionally with product teams, circuit enablement, foundries, and customers to prioritize and execute methodology strategy, deliverables, and adoption plans.

Reasonable accommodations are available during recruitment and employment; contact hr-help-canada@synopsys.com for requests.

Experience Level

Senior-level. The posting specifies 25–30 years of IC design experience with a BSEE, or 22–25 years with an MSEE or PhD; equivalent senior experience is expected.

Responsibilities

Primary responsibilities include ownership, stakeholder engagement, and execution of analog methodology across domains.

• Own and prioritize analog and adjacent-domain methodology areas end-to-end.
• Act as the focal point for customer-driven methodology requirements and integration challenges.
• Coordinate methodology adoption across product teams, adjacent engineering organizations, and foundries.
• Define and drive methodology strategy, escalation paths, and measurable accountability.
• Support methodology requirements for application-optimized IP and special-purpose silicon projects.
• Mentor, review, and approve the work of other engineers; set objectives for critical methodology assignments.

Requirements

Technical must-haves and preferred skills for successful performance in this role.

• Expert knowledge of analog and mixed-signal methodology, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, and SI/PI integration.
• Deep understanding of transistor-level circuit design, CMOS fundamentals, and physical IP, including reliability effects (electromigration, IR drop, aging).
• Experience with transistor-level simulation, static timing analysis (STA), and reliability analysis.
• Proven experience defining methodology for advanced process nodes and collaborating with foundries and circuit enablement teams.
• Strong scripting and automation skills to streamline design processes and toolchains.
• Customer-facing credibility with product teams and foundries; ability to influence technical decisions and represent methodology to leadership.
• Experience applying AI/ML techniques to analog circuit optimization and methodology automation is a plus.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field required; MSEE or PhD preferred. The posting specifies 25–30 years of IC design experience with a BSEE, or 22–25 years with an MSEE or PhD.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.