Analog Layout Design Staff Engineer

Role Summary

The Analog Layout Design Staff Engineer will work on custom layout designs for high-performance Analog IPs. You will apply advanced layout techniques and collaborate with cross-functional teams to ensure design integrity and efficiency. This role requires a keen understanding of semiconductor technology and the ability to mentor junior engineers.

Experience Level

The ideal candidate will have over 5 years of hands-on experience in custom layout design, particularly in analog circuits. Proficiency in Cadence and Synopsys tools, along with experience in layout verification, is essential.

Responsibilities

• Design custom layout for Analog IPs, including High-Speed I/Os, PLLs, and other components.
• Engage in floor planning, power design, signal routing, and parasitic optimization.
• Lead and mentor junior layout engineers through project phases.
• Verify layouts using DRC, LVS, ERC, and ensure compliance with ESD and DFM requirements.
• Collaborate with other engineering teams to integrate layouts into top-level designs.
• Participate in global team design reviews, sharing knowledge and best practices.
• Contribute to research programs, enhancing design methodology for future products.

Requirements

Ideal candidates will possess a degree in Electronics Engineering or a related field. In addition to extensive experience in custom layout design, you should be skilled in multiple tools and have a strong grasp of semiconductor processes. Effective communication in English and the ability to prepare layout reviews and reports are necessary.

Education Requirements

BS in Electronics Engineering, Electromechanics, Telecommunications, or a related field.