Job Title
Advanced Packaging & Assembly Yield Analytics Engineer, Staff
Role Summary
The engineer will lead yield analytics and manufacturing optimization for advanced package technologies (2.5D, 3DIC, chiplets, heterogeneous integration). The role partners with OSATs, substrate suppliers, Package Design, Product Engineering, Reliability, Quality and Manufacturing to identify yield limiters and enable high-volume production.
Experience Level
Senior β typically requires 5+ years of semiconductor industry experience in package engineering, assembly, product engineering, yield engineering, or manufacturing analytics. Minimum qualifications in the posting also specify degree-dependent experience thresholds (see Education Requirements).
Responsibilities
Key responsibilities include analyzing manufacturing and test data, driving root-cause analysis, and implementing analytics and process improvements.
- Perform yield analytics across assembly, substrate, wafer, and electrical test data to identify yield loss mechanisms.
- Develop correlations between package yield, assembly process parameters, substrate characteristics, and test results.
- Lead root-cause isolation and corrective actions with OSATs, substrate suppliers, and cross-functional teams.
- Support NPI and yield ramp activities through risk assessment, characterization, and monitoring.
- Develop automated dashboards, KPIs, and reporting to monitor manufacturing health and product quality.
- Build predictive analytics and machine-learning models to accelerate yield learning and detect manufacturing risks.
- Define data requirements and analytics infrastructure for assembly and substrate manufacturing partners.
- Drive continuous improvement initiatives to optimize yield, cycle time, quality, and manufacturing efficiency.
Requirements
Core technical skills, tools, and professional capabilities required for the role.
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Must-have: 5+ years semiconductor industry experience in package/assembly/yield engineering or manufacturing analytics (posting lists 5+ years in main qualifications).
- Strong understanding of semiconductor assembly processes, package structures, substrate technologies, and manufacturing flows.
- Experience with yield analysis, statistical methods, root-cause investigation, and large-scale manufacturing data analytics.
- Proficiency in analytical and data tools such as Python, SQL, JMP, Power BI, Tableau, and Excel.
- Demonstrated ability to solve complex technical problems using data-driven approaches and to communicate results across global, cross-functional teams.
- Ability to travel to OSATs and manufacturing partner sites across Taiwan and Asia.
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Nice-to-have / Preferred: experience with advanced packaging (2.5D, 3DIC, CoWoS, SoIC, Fan-Out, FCBGA, chiplets), package reliability and failure analysis, SPC/process control methodologies, and applying AI/ML to yield analytics.
Education Requirements
Degrees: M.S. or Ph.D. in Electrical Engineering, Materials Science, Applied Physics, Mechanical Engineering, Industrial Engineering, or a related field are listed in the primary qualifications. The posting also lists minimum qualification options: Bachelor's degree in Science/Engineering (plus 4+ years relevant experience) OR Master's degree (plus 3+ years) OR PhD (plus 2+ years) in Science/Engineering or related field with ASIC design/verification/validation/integration or related experience.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

Date Posted: 2026-07-10