3DIC Yield Analytics & Diagnostics Engineer

Job Title

3DIC Yield Analytics & Diagnostics Engineer

Role Summary

Lead diagnostics and yield-analytics efforts for 2.5D and 3DIC technologies, producing data-driven insights across wafer, die, module and multi-die stacks to identify yield limiters and enable root-cause resolution.

Experience Level

Mid-level. Requires several years of hands-on semiconductor yield/diagnostics experience and demonstrated ability to lead technical analyses that improve manufacturing yield.

Responsibilities

Primary responsibilities include:

• Lead 3DIC yield analytics initiatives to improve yield across wafer, packaging, and test operations.
• Perform deep analysis of large-scale diagnostics datasets to identify systematic, random, and parametric failure mechanisms.
• Develop and scale methodologies for analyzing heterogeneous 3DIC data (wafer sort, final test, module, and stack-level data).
• Conduct advanced scan diagnostics and ATPG analysis including clustering and root-cause decomposition.
• Analyze TSV, interposer, and 3D stack-related failures to find cross-layer interactions and integration challenges.
• Drive structured root-cause analysis (RCA) and validate identified failure mechanisms.
• Interpret memory diagnostics data (bitmap analysis across SRAM and stacked DRAM) and correlate findings with process, design, and packaging factors.

Requirements

Required and preferred technical skills:

• Must-have: Strong experience in yield analytics, diagnostics, and semiconductor data analysis; proven record of yield improvement in high-volume manufacturing.
• Expertise analyzing large-scale diagnostics datasets and performing scan diagnostics, ATPG analysis, clustering, and root-cause decomposition.
• Ability to correlate diagnostic findings with process, layout/design, and packaging factors to drive yield learning.
• Experience with defect modeling and layout/process correlation.
• Nice-to-have: Deep understanding of 3DIC architectures, TSV/interposer technologies, advanced packaging flows, and DRAM diagnostics; experience building and scaling yield-analytics frameworks; hands-on application of ML/AI techniques in yield analytics.
• Strong communication skills and demonstrated technical leadership.

Education Requirements

Degree in Engineering, Science or a related technical field is required. The posting lists varying experience minima tied to degree level: preferred guidance included Bachelor's +6 years, Master’s +5 years, PhD +4 years; a separate minimum-qualification block listed Bachelor's +4 years, Master’s +3 years, PhD +2 years (specifically for ASIC design/verification/validation/integration experience). Equivalent practical experience is considered under those degree-based pathways.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.