Synopsys HSPICE Analog Simulation Engineer Jobs: Browse Roles
When a bandgap reference has to hold across process corners, or a standard cell library needs the characterization the whole SoC will trust, the simulator on the bench is usually HSPICE. Synopsys HSPICE analog simulation engineer jobs go to analog designers who treat that simulator as their primary instrument, not a box they run at the end.
The day-to-day is transistor-level work. You write and debug HSPICE netlists, run transient, AC, DC sweep, noise, and Monte Carlo analyses, and read the output well enough to tell a real circuit problem from a convergence artifact. Accuracy is the point. HSPICE ships with BSIM4 and BSIM-CMG FinFET models that most foundry PDKs validate against, so it tends to be the reference other simulators get checked against.
Most shops pair it with a schematic and layout front end. Cadence Virtuoso for entry, HSPICE for the signoff simulation, is a common split. If you are weighing analog work more broadly, analog IC design engineer roles and Cadence Spectre analog simulation engineer jobs sit right next to this one, and the Spectre versus HSPICE tradeoff comes up in most interviews.
What separates a strong candidate is evidence, not tool familiarity. Hiring managers want at least one full tapeout where your simulation work mattered: the block you signed off, the corner that nearly failed, the Monte Carlo run that caught a mismatch problem before silicon. A specific story about a convergence issue you chased down reads better than a resume line that says "HSPICE".
Hiring concentrates where simulation accuracy decides silicon: power management, memory, data converters, and standard cell teams. Analog Devices and Texas Instruments hire for precision analog, Qualcomm for power and RF front ends, and the in-house analog groups at Apple and Nvidia for custom blocks. AI accelerator and power-IC startups want the same skill set, often with more scope per engineer. A mid-level analog simulation engineer in the US usually sees $130K to $170K base, with staff-level total compensation reaching $220K to $300K at larger firms. The semiconductor salary guide breaks those ranges down by level.
If you want these to find you, save a search for analog simulation roles on semidesignjobs.com and list your HSPICE experience on your profile. You get an email when something matching opens.
FAQ
What makes Synopsys HSPICE a gold-standard SPICE simulator?
Two things: tight transistor-model accuracy and convergence that holds on hard circuits. Its BSIM4 and BSIM-CMG FinFET models are among the most accurate in use, and most foundry PDKs ship HSPICE-verified process models. For bandgap references, data converters, and standard cell characterization, HSPICE is the simulator other tools get validated against.
How does HSPICE support Monte Carlo simulation for yield analysis?
Monte Carlo in HSPICE varies transistor parameters such as threshold voltage mismatch, oxide thickness, and mobility using the statistical distributions in the PDK process files. Run a few hundred to a few thousand samples and you get yield statistics on the metrics that matter, like offset voltage, phase noise, and SNDR, so you can judge design margin before tapeout.
When would an analog engineer choose HSPICE over Cadence Spectre?
Reach for HSPICE when the PDK models were validated against it, when you need cross-verification to trust an accuracy number, or when a customer or publication expects industry-standard results. Spectre is usually faster and better wired into the Virtuoso GUI, so it stays the default for interactive, day-to-day design iteration.