Semiconductor Design Engineer Jobs in Silicon Valley
Silicon Valley still anchors the world's chip design work. NVIDIA, AMD, Broadcom, Marvell, Synopsys, and Cadence all run design centers within a few miles of each other, and a steady stream of AI chip startups keeps adding openings on top of that.
Roles here cover the full design stack. You will find RTL and microarchitecture work, physical design and timing closure, and pre- and post-silicon verification, spread across Santa Clara, San Jose, Sunnyvale, Mountain View, Milpitas, and Cupertino. Filter by city or zip code on SemiDesignJobs to keep the search tight.
The day-to-day depends on your discipline. RTL designers hand off lint- and CDC-clean code to synthesis and DFT. Physical design engineers push blocks through floorplanning, place and route, and timing closure in Synopsys ICC2 or Cadence Innovus. Verification engineers build UVM environments and chase coverage closure in Synopsys VCS or Cadence Xcelium. AI accelerator teams add datapath and memory-subsystem work at 5nm and 3nm.
NVIDIA staffs GPU and data center silicon out of Santa Clara. Broadcom and Marvell run networking and storage ASIC teams across San Jose and Santa Clara. Synopsys and Cadence hire for their own silicon IP as well as the EDA tools everyone else runs. AMD builds CPU and GPU cores around San Jose, and startups like Cerebras and Groq compete for the same architects and RTL leads. The full list of employers hiring in the region runs long.
Pay reflects the cost of living and the fight for talent. Total packages commonly run from about $150K for new graduates to $300K–$500K and up for senior engineers and architects once equity and bonus land. The salary guide breaks the numbers down by level.
The density of employers is the real draw. You can change jobs without changing your commute, and the same conferences and meetups keep you connected to people on a dozen other design teams. Companies hire across every band, from new grads to principal engineers and fellows.
If you are targeting the area, browse ASIC design engineer jobs in Santa Clara and physical design engineer jobs in San Jose to narrow by discipline. Save a search on SemiDesignJobs, set your location preferences, and turn on alerts so a matching role reaches your inbox the day it posts.
FAQ
Which companies offer the most semiconductor design engineer jobs in Silicon Valley?
NVIDIA in Santa Clara, Broadcom in San Jose, Synopsys in Sunnyvale, Cadence in San Jose, AMD in San Jose, Marvell in Santa Clara, and a cluster of AI chip startups collectively post hundreds of semiconductor design roles across Silicon Valley each year.
What is the average salary for semiconductor design engineers in Silicon Valley?
Total compensation typically runs from about $150K for new graduates to $300K–$500K and up for senior engineers and architects, counting base, bonus, and equity. The exact number varies widely by company and experience level.
Are hybrid or remote semiconductor design engineer jobs available in Silicon Valley?
Some companies offer hybrid schedules, especially for senior engineers. Most still expect partial on-site presence given the collaborative nature of hardware design and the use of specialized EDA hardware. SemiDesignJobs labels each listing's work model.