Lattice Semiconductor FPGA Design Engineer Jobs

Lattice Semiconductor bet on the opposite end of the FPGA market from Xilinx/AMD and Intel: small, low-power programmable logic instead of high-performance parts. That focus shapes what its design engineers actually work on day to day.

Lattice FPGA design engineer roles cover fabric architecture, IP core development, and the tools that program the parts. Expect strong digital design and HDL work, plus a real grasp of FPGA internals like configurable logic blocks, routing fabric, and embedded memory. Power optimization matters more here than raw throughput.

SemiDesignJobs lists Lattice openings from the Hillsboro, OR headquarters and offices in San Jose, CA; Broomfield, CO; and Penang, Malaysia. Filter by team, whether architecture, IP, tools, or applications, and by location.

The MachXO, ECP, CrossLink, and Certus families are built on TSMC processes from 28nm to 40nm, so engineers get deep experience tuning FPGAs for cost- and power-sensitive designs. Hard IP work spans PCIe, MIPI, and video blocks, and the Radiant, Diamond, and Propel tool suites sit next to the fabric teams.

Hiring tracks Lattice's growth areas: edge AI inference, server OCP management cards, factory automation, automotive driver assistance, and 5G small cells. FPGA-based server management in particular has been a steady source of new roles.

FPGA design pay in the US typically runs from roughly $110K base early-career to well over $180K in total compensation for senior and staff engineers. The semiconductor salary guide breaks it down by role.

Start with related FPGA design engineer jobs and Lattice-specific searches like Lattice Semiconductor jobs in Hillsboro, Oregon, or open the Lattice Semiconductor careers page. Save a search on SemiDesignJobs to get an email when a new Lattice FPGA role opens.

FAQ

What makes Lattice Semiconductor FPGA design engineer jobs unique?

Lattice focuses on ultra-low-power FPGAs for edge applications, so engineers tackle power optimization challenges that differ from high-performance FPGA design at Xilinx or Intel/Altera.

What tools do Lattice FPGA design engineers use?

Lattice engineers use the Radiant and Diamond design suites alongside industry-standard HDL simulation tools. Internal fabric work also involves custom place-and-route tools and circuit-level simulation.

What markets do Lattice Semiconductor FPGA design engineers target?

Lattice FPGA engineers design for edge AI inference, factory automation, automotive driver assistance, and 5G small cell markets. The devices are valued for combining programmability with low static power.