Entry Level ASIC Design Engineer Jobs: Start Your IC Career
Most ASIC design teams at Qualcomm, Broadcom, and Marvell run structured new-grad programs that pair you with a senior engineer from your first week. If you finished a BS or MS in Electrical Engineering or Computer Engineering with coursework in digital design or computer architecture, entry level ASIC design engineer jobs are the most direct path onto a shipping chip program.
What does the day-to-day actually look like? You'll write RTL in SystemVerilog or Verilog, run lint checks and simulations, trace signal issues in waveform viewers, and sit through code reviews with your block lead. Most teams start new engineers on something self-contained: a clock divider, a bus arbiter, or a small state machine controller. Within six to twelve months, you'll own a full block and coordinate with the verification team on testbench coverage before handing off lint-clean, CDC-clean RTL to synthesis.
Familiarity with Synopsys VCS, Cadence Xcelium, or Siemens Questa is a plus, though companies expect to train you on their specific EDA flows during onboarding. What separates strong candidates from the rest of the stack is project work: a Verilog design running on an FPGA board, contributions to open-source RISC-V cores, or a well-documented tapeout class project all carry more weight than GPA alone. Most programs look for a minimum 3.0, but a real portfolio can offset a lower number.
The companies that hire most consistently for these roles include Qualcomm (San Diego, Hyderabad), AMD (Austin, Santa Clara), Broadcom (San Jose, Irvine), Marvell (Santa Clara), and Intel (Hillsboro, Haifa). AI chip startups building custom accelerators for data center inference have become reliable entry-level employers too, often recruiting straight from university career fairs. New grad RTL engineer positions and junior physical design roles overlap heavily with this search.
Base salary at established semiconductor companies runs $110K to $140K. Signing bonuses and first-year equity vesting push total compensation into the $120K to $160K range. Startups sometimes trade a lower base for a bigger equity stake. You can compare current numbers by geography and company size in the semiconductor salary guide.
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FAQ
What GPA or qualifications do entry level ASIC design engineer jobs require
Most structured new-grad programs set a 3.0 GPA floor, but candidates with strong project portfolios get hired below that regularly. A Verilog design on an FPGA, contributions to open-source chip projects, or a documented class tapeout all matter more to hiring managers than transcripts. Pair that with coursework in digital design and VLSI, and you're competitive.
What is the typical salary for entry level ASIC design engineer jobs
Base salary at mid-size and large semiconductor companies runs $110K to $140K. Signing bonuses and equity push total first-year compensation to $120K to $160K, depending on location and company stage. Startups may lean heavier on equity with a slightly lower base.
What should I include in my resume for entry level ASIC design engineer jobs
Lead with RTL design projects and link to GitHub repos where possible. Follow with coursework in digital design and VLSI, any semiconductor internship or co-op, and tool familiarity with VCS, ModelSim, or Cadence. Describe what each project accomplished rather than listing tools. Hiring managers want to see outcomes.