Verification Engineer - UVM / ASIC

Company Overview

Advanced Micro Devices Inc is a technology company known for developing innovative products that enhance computing experiences across various platforms, including data centers and consumer devices.

Role Summary

The Verification Engineer will be engaged in verifying designs for AMD's next-generation Data Center network products. This role entails developing comprehensive test plans adhering to the UVM standard to ensure coverage closure across all ASIC design stages.

Experience Level

Mid-Career

Responsibilities

• Collaborate with design and engineering teams to understand features requiring verification.
• Create detailed test plans considering hardware, firmware, and driver interactions.
• Estimate timelines for writing new feature tests and necessary environment modifications.
• Develop both directed and random verification tests.
• Debug test failures, identifying root causes and collaborating with engineers to resolve defects.
• Review functional and code coverage metrics, adjusting tests to achieve coverage goals.

Requirements

• Proficient in IP level ASIC verification and debugging firmware and RTL code with simulation tools.
• Experience developing UVM/SV testbenches and familiarity with Verilog, System Verilog, C, and C++.
• Knowledge of PCIe and Ethernet protocols.
• Experience with automating workflows in distributed computing environments.
• Familiarity with simulation profile and efficiency improvements.
• Proficiency in scripting languages such as Python, Ruby, Makefile, or shell.
• Leadership and mentorship abilities are desirable.
• Experience with network processors is a plus.

Education Requirements

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.