Staff Verification Engineer - Silicon Design

Role Summary

The position involves the verification of advanced DDR interfaces in a server memory products team. As a Staff Verification Engineer, you will be pivotal in ensuring that memory protocols like DFI, DDR5, and LPDDR5/LPDDR6 are thoroughly tested and validated in various DIMM configurations.

Experience Level

This role is suited for seasoned professionals with significant experience in verification engineering and a strong background in memory systems.

Responsibilities

• Develop and execute verification plans for DDR5, LPDDR5, and DFI memory systems.
• Ensure alignment of hardware, firmware, BIOS, and software to validate memory interfaces.
• Engage in cross-functional discussions with architects and design engineers based on RTL and micro-architecture understanding.
• Contribute to verification methodologies and share knowledge within the team.
• Assist post-silicon teams with performance, power, and functional issue resolution.

Requirements

Strong proficiency in SystemVerilog and UVM for creating testbenches and simulations. Candidates should also have proven experience in collaborating with hardware, firmware, and software teams. Excellent communication and presentation skills are mandatory, alongside a willingness to lead knowledge-sharing initiatives.

Education Requirements

A Bachelor’s or Master’s degree in a relevant field is required.