Role Summary
The position requires a Verification Engineer specializing in server memory products. The individual will oversee the verification of DDR interfaces and advanced memory protocols including DFI, DDR5, and LPDDR5/LPDDR6.
Experience Level
This role is suited for a mid-career professional with significant expertise in verification engineering within the semiconductor industry.
Responsibilities
- Develop and execute verification plans for DDR5, LPDDR5, and DFI memory systems in server products.
- Analyze the PHY's interactions with HW (Silicon), FW, BIOS & SW for feature enablement in memory interfaces.
- Engage with IP/Domain architects and Design engineers concerning RTL, micro-architecture, and debug discussions.
- Contribute to verification methodology and share knowledge within the team.
- Provide support to Post-Si teams for product performance evaluation and debugging functional issues.
Requirements
- Irrefutable knowledge of SystemVerilog, UVM, C/C++, and familiarity with scripting languages (Python/Perl).
- Experience in creating SystemVerilog and UVM-based testbenches for DDR5 and LPDDR5.
- Ability to work closely with hardware, firmware, and software teams.
- Capital experience in building VIPs and BFMs for memory interfaces and formal verification methods.
- Outstanding communication and management skills.
Education Requirements
Bachelor’s or Master’s degree in a related engineering discipline is required.