Role Summary
AMD is looking for an experienced Design Verification Engineer to verify a leading-edge PCIe Controller Design. This role involves working on next generation technology that will be pivotal in future AMD SOCs for AI, gaming, and computing.
Experience Level
Level - Mid-Career
Responsibilities
- Execute functional verification from test plan to verification signoff.
- Collaborate with architects and designers to comprehend IP features.
- Write, implement, and review Test Plans.
- Verify high-speed digital designs using coverage driven random, directed testing, and Formal verification methods.
- Manage verification flow from test planning to sign-off closure for SubSystem level IP interoperability.
- Develop testbench components and libraries while employing Object Oriented Programming techniques under UVM methodology.
- Participate in Code Reviews.
- Provide technical leadership and block ownership throughout the verification process.
Requirements
- Proven experience in verifying commercially successful IPs, Subsystems, or SoCs.
- Strong capability to mentor junior and senior engineers, effective team player with solid technical skills.
- Expertise in SystemVerilog and UVM.
- Proficient in object-oriented programming languages, scripting (Ruby, Python, Perl), and low-level programming languages.
Education Requirements
Bachelors or Masters degree in Electronics/Computer/Electrical Engineering with 7+ years of relevant DV experience.