Role Summary
Arm’s DFT methodology team develops DFT strategies for various projects, enhancing soft IP, hard macros, test chips, and physical library IP across all design sites. This team is responsible for establishing and promoting DFT methodologies throughout Arm and collaborating with EDA vendors to support these initiatives.
Experience Level
Staff or Principal level engineering experience is required, with a focus on DFT processes and methodologies.
Responsibilities
Key responsibilities include:
- Supporting DFT initiatives across multiple design centers.
- Implementing innovative DFT techniques that influence the evolution of CPU, GPU, ML, and systems IP.
- Contributing to DFT methodologies by crafting flows, evaluating tool capabilities, and documenting processes.
- Collaborating with EDA vendors and providing DFT training to customers.
Requirements
Applicants should possess proven experience and skills in the following areas:
- Proficiency in Perl, TCL, and/or C programming.
- Experience with Unix/Linux environments.
- Core DFT skills such as at-speed testing, test insertion, coverage assessment, Memory BIST, Logic BIST, JTAG, IJTAG, and fault simulation.
- Familiarity with DFT tools from Siemens, Cadence, or Synopsys.
Education Requirements
A university degree (or equivalent) in Electronic Engineering, Computer Engineering, or a related technical field is required.