Staff Engineer – ASIC Physical Design

Role Summary

As a Staff Engineer in ASIC Physical Design, you will leverage your expertise in ASIC physical design and leading-edge CAD tools to drive the end-to-end physical design process of customer ASICs and SoCs. You'll be involved in implementing DDR and HBM PHYs, while collaborating with cross-functional engineering teams to solve design challenges and optimize for power, performance, and area.

Experience Level

Minimum of 5 years of hands-on experience in ASIC physical design, with a proven record in implementing complex IPs like DDR and HBM PHYs.

Responsibilities

• Implement DDR and HBM PHYs for customer ASICs and SoCs using advanced CAD tools.
• Manage the entire physical design process including synthesis, floor planning, place & route, and physical verification.
• Collaborate with engineering teams to maintain design quality and manufacturability.
• Identify and mitigate design risks while optimizing for performance and power.
• Provide mentorship to junior engineers and promote a culture of learning.
• Document design processes and improvements to enhance efficiency.

Requirements

Expertise in CAD tools (such as ICC2/FC and ICV) and knowledge of FinFET process technologies. Strong understanding of RTL-to-GDSII flows, a Bachelor’s or Master’s degree in Electronics or VLSI is required. Excellent communication skills, a collaborative mindset, and a proactive, problem-solving approach are essential.

Education Requirements

Bachelor’s or Master’s degree in Electronics, VLSI, or related engineering discipline.