Staff DRAM RTL Design Engineer

Job Title

Staff DRAM RTL Design Engineer

Role Summary

Design and deliver digital memory IP from microarchitecture through RTL, integration, and support for physical silicon. Work across architecture, design, verification, CAD/EDA and physical design teams to enable DRAM/SoC design and sign-off.

Role focuses on RTL design, full-chip integration, verification, and introducing AI/automation into RTL and verification flows.

Experience Level

Senior — typically 6–10 years of relevant RTL and digital design experience.

Responsibilities

Primary responsibilities include RTL development, integration, verification, and driving design methodology and automation.

• Define microarchitecture, create RTL, and integrate IP blocks into larger systems.
• Define and review module interfaces and system-level architecture.
• Apply AI/ML tools and automation to accelerate RTL optimization, testbench generation, corner coverage, and debug across simulation and silicon learning loops.
• Develop semicustom memory design methodology and support full-chip integration (CDC, lint, synthesis, STA, power analysis).
• Collaborate with CAD, EDA, software, verification, and physical design teams to integrate AI-driven flows and achieve design sign-off.
• Oversee layout activities including floor-planning, placement, and routing when required.
• Perform block-level and full-chip verification: functional, timing, power, and reliability analysis using industry and Micron-specific tools.
• Provide technical mentorship and participate in design and methodology reviews.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Demonstrated expertise in RTL design and digital IP development.
• Solid knowledge of asynchronous and synchronous design concepts and CDC methodologies.
• Deep understanding of SoC design flows: lint, CDC, synthesis, STA, and power analysis.
• Fundamentals in CMOS circuit behavior, device physics and memory operation.
• Ability to work effectively with global, cross-functional teams and communicate technical results clearly.
• Strong problem-solving skills and collaborative work style.

Nice-to-have:

• Domain experience in DRAM (DDR5, LPDDR5, HBM) or other memory technologies.
• Exposure to AI/ML-assisted design flows, agentic AI, or advanced automation in digital design and verification.
• Experience with Spyglass and semicustom SoC/ASIC flow.
• Domain knowledge in NAND memory design.

Education Requirements

Master's degree in electrical engineering or computer engineering is specified by the posting (Master’s degree in electrical or computer engineering with 6–10 years of RTL design experience). No other degrees, certifications, or equivalent-degree language was listed.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.