Staff DFT Engineer

Role Overview

We are looking for a highly skilled Staff DFT Engineer with extensive hands-on experience in DFT methodologies and tools. This role involves significant collaboration across various engineering teams to ensure effective Design-for-Test (DFT) implementation and verification for complex system-on-chip (SoC) designs.

Job Summary

This position requires an individual who can take ownership of DFT processes across different stages of design, from insertion to post-silicon debug. Key responsibilities include MBIST, BISR, boundary scan, and IJTAG integration, requiring adept problem-solving abilities and a strong commitment to DFT quality and efficiency.

Experience Level

Target candidates should possess 5+ years of relevant industry experience in DFT roles, with a strong background in implementation and verification processes.

Key Responsibilities

• Perform DFT insertions including MBIST and BISR integration.
• Implement and verify boundary scan and IJTAG requirements.
• Engage in the execution of DFT verification and DRC closure using Siemens Tessent.
• Debug and resolve DFT rule violations at both block and top levels.
• Generate, simulate, and analyze MBIST and logic ATPG patterns.
• Collaborate closely with RTL, Physical Design, and ATE teams for DFT success.
• Create and maintain TCL scripts to automate DFT processes.
• Support testing during pre-silicon sign-off and assist during post-silicon debug.

Required Qualifications

Applicants must hold a Bachelor’s degree in Computer Science, Electrical Engineering, or related fields, along with 3-5 years of experience; or a Master’s/PhD with 2-3 years of experience. Proficiency with Siemens Tessent and strong TCL scripting skills are essential.

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent experience; advanced degrees preferred.