Staff Design Engineer (Low Power)
Join Qualcomm's Integrated Wireless Technology team to develop low-power micro-architecture and ASIC designs for Wi‑Fi and SoC products. The role covers the full ASIC lifecycle from specification through RTL, synthesis, timing closure, emulation, and post-silicon bring-up.
The engineer will collaborate closely with verification teams, perform silicon power measurement and debug, and implement power-reduction techniques across multi-domain clocking and standard bus interfaces.
Senior. This role expects multiple years of ASIC/SoC design experience; see Education Requirements for specific degree-and-experience combinations.
The primary responsibilities are low-power micro-architecture and end-to-end ASIC design and bring-up.
Must-have technical skills and experience relevant to low-power SoC design.
Nice-to-have:
One of the following degree + ASIC experience combinations: Bachelor's in Science, Engineering, or a related field with 4+ years ASIC design experience; Master's in Science, Engineering, or related field with 3+ years ASIC design experience; or PhD in Science, Engineering, or related field with 2+ years ASIC design experience.
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
