SRAM Design Senior Engineer

Role Summary

The SRAM Design Senior Engineer will work on designing and verifying the performance of SRAM integrated circuits and enhancing SRAM compilers to deliver high-quality, reliable memory solutions.

Experience Level

Entry to Mid-Career, with 0–3 years of relevant experience in SRAM circuit design and EDA tool usage.

Responsibilities

• Designing and verifying the robustness of SRAM integrated circuits for optimal performance.
• Developing SRAM compilers, focusing on the layout for efficient memory integration.
• Characterizing SRAM modules to meet timing, power, and functional specifications.
• Analyzing SRAM bitcell design criteria for various memory architectures.
• Utilizing EDA tools (XA, Hspice, Verilog, Starrc, EMIR) for simulations and design optimizations.
• Collaborating with teams to address post-silicon issues and enhance memory IP quality.
• Exploring new SRAM architectures for innovative IP solutions.

Requirements

• Master’s degree in Electrical/Electronic Engineering or related field.
• Strong understanding of CMOS-based circuit design and SRAM architectures.
• Solid knowledge of digital circuit design and VLSI processing concepts.
• Familiarity with scripting languages (Python, Tcl/Tk, Perl, Unix shell) for workflow automation.
• Experience in SRAM design and post-silicon debug processes is a plus.
• Proficiency in EDA tools including XA, Hspice, and Verilog.

Education Requirements

Master’s degree in Electrical/Electronic Engineering or a related field is required.