Sr. Staff Design Verification Engineer

Role Summary

The Sr Staff Design Verification Engineer – Graphics Core/IP will focus on planning, building and executing the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

Experience Level

Mid-Career

Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.
• Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases.
• Estimate the time required to write the new feature tests and any required changes to the test environment.
• Build the directed and random verification tests.
• Debug test failures to determine the root cause; work with RTL, software or firmware engineers to resolve design defects and correct any test issues.
• Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements.
• Run tests on hardware emulator builds to verify IP functionality and/or performance.

Requirements

• Proficient in IP level ASIC verification.
• Proficient in debugging firmware and RTL code using simulation tools.
• Strong background in the C++ language, preferably on Linux with exposure to Windows platform.
• Experienced with Verilog and System Verilog.
• Graphics pipeline knowledge.
• Scripting language experience: Python, Ruby, Makefile, shell preferred.

Education Requirements

Undergrad degree required. Bachelors or Masters degree in computer engineering/Electrical Engineering preferred.