Job Title
Sr. Silicon Design Engineer
Role Summary
This role involves working on front-end digital design, including RTL design and optimization, verification, and synthesis for advanced mixed-signal environments using 7nm and 16nm FinFET CMOS processes.
Experience Level
Level - Mid-Career
Responsibilities
- Solid front-end design experience in a modern IC / ASIC design environment.
- Experience with tools and design flows including RTL design and verification, CDC checking, linting, DFx, power estimation and design for low power.
- Strong knowledge of SystemVerilog and logic design concepts.
- Good written and oral communication skills.
- Strong problem solving skills.
- Ability to work well as part of a collaborative multi-site interdisciplinary team.
- Understanding of physical design flows including synthesis, STA, P&R.
- Awareness of physical implementation constraints on design and design optimization.
Requirements
- Minimum education level / experience: BS + 4 years, MS + 3 years, PhD + 1 year.
Education Requirements
Bachelor's degree (BS) with at least 4 years of experience, Master's degree (MS) with at least 3 years of experience, or PhD with at least 1 year of experience.