Sr. ASIC/SOC Verification Engineer (Silicon Engineering)

Role Summary

Responsible for digital ASIC verification at block and system level for the Starlink project. This position requires developing next-generation ASICs intended for deployment in space and ground infrastructures.

Experience Level

Mid-Career

Responsibilities

• Responsible for digital ASIC verification at block and system level
• Write and review test plans, develop test harnesses and test sequences
• Responsible for test plan execution, running regressions, code and functional coverage closure
• Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
• Be a hands-on self-starter who can execute the steps required to fully verify complex digital designs

Requirements

• Education Requirements:
  • Bachelor’s degree in electrical engineering or computer engineering
• 5+ years of experience with design verification and test bench development

• Preferred Skills and Experience:
  • Advanced degree in electrical engineering or computer engineering
  • Experience with verification methodologies such as UVM/OVM/VMM
  • Strong object-oriented programming knowledge
  • Strong problem-solving and coding skills
  • Experience in constrained random verification
  • Expertise in developing test plans, implementing coverage models, and analyzing results
  • Experience with scripting languages, e.g. Python for automation
  • RTL design, chip bring-up, and post-silicon validation experience
  • Ability to work in a dynamic environment with changing needs and requirements
• Must be willing to work extended hours and weekends as needed