SOC Performance Verification Engineer (Simulation)

SOC Performance Verification Engineer (Simulation)

As a Silicon Design Engineer, you will work with IP/SOC designers and performance architects to validate SOC performance metrics for meeting product performance goals. You should have a passion for modern, complex processor architecture, digital design, and verification in general. Excellent communication skills, strong analytical and problem-solving skills are essential, along with a willingness to learn and tackle challenges.

Experience Level

3-4 years of SOC project level experience is preferred.

Responsibilities

• Drive bring-up of performance tests at SOC level by working with IP and SOC teams.
• Write tests, sequences, and testbench components in C++, SystemVerilog, and UVM for performance verification of the design.
• Handle regressions and generate performance results by enhancing existing post-processing scripts.
• Debug performance outliers by collaborating with the IP Performance Verification teams.

Requirements

• Education Requirements: Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering.
• Experience or familiarity with functional verification tools such as VCS, Synopsys.
• Good understanding of computer organization/architecture.
• Basic knowledge of performance verification and scripting expertise for automation.