SOC Design Engineer

Role Summary

This position involves working on the RTL design and integration within the System on Chip (SoC) design team at Advanced Micro Devices. The role requires collaboration on various subsystems and IP cores to create high-performance SoC products, specifically targeting domains such as networking, security, and storage.

Experience Level

The ideal candidate should have multiple years of experience in RTL design for ASIC projects, with a deep understanding of digital design principles and practices. A collaborative mindset and the ability to work across different teams and time zones are crucial for success in this role.

Responsibilities

The responsibilities include:

• Developing and maintaining synthesizable RTL for SoC and subsystems.
• Collaborating with IP architecture, SoC architecture, and design leads.
• Debugging and resolving integration issues with SoC design verification teams.
• Working with the IP development teams to achieve SoC performance metrics.
• Resolving simulation regression failures and supporting the Emulation Team.
• Participating in technical meetings to discuss project status.

Requirements

To qualify for this position, candidates should have:

• Experience in RTL design using Verilog/System Verilog, particularly with leading edge ASIC technologies.
• Proficiency in ASIC design tools and flows, including timing closure processes.
• Familiarity with design checks using standard ASIC tools.
• Skills in scripting languages such as Python, Perl, or TCL.
• Expertise in simulation and debugging with functional verification tools.
• Knowledge of bus/interface protocols like AXI and AHB.
• Understanding of networking protocols and security technologies relevant to digital communication systems.

Education Requirements

A Bachelor’s or Master’s degree in Computer or Electrical Engineering is required for this position.