SOC/ASIC Physical Design Engineer II

Role Summary

The SOC/ASIC Physical Design Engineer II position at SpaceX involves developing next-generation ASICs for deployment in space and ground infrastructures. The role requires a proactive and collaborative engineer who will work with various cross-disciplinary teams to enhance connectivity through advanced technologies.

Experience Level

This position requires a proficient engineer with at least 3 years of experience in RTL2GDSII physical design or physical design flow development.

Responsibilities

• Manage partition synthesis and physical implementation including tasks like synthesis, floorplanning, and physical verification.
• Develop and enhance physical design methodologies and automation scripts.
• Collaborate with the ASIC design team to establish design targets and feasibility studies.
• Troubleshoot and resolve design issues, ensuring timely execution.
• Address signoff closure issues related to static timing analysis and physical verification.

Requirements

Applicants must hold a Bachelor’s degree in electrical engineering, computer engineering, or computer science. Experience with EDA tools, deep sub-micron processes, and CMOS design principles is preferred. Additionally, candidates should possess scripting skills in various programming languages and be capable of thriving in a dynamic team environment.

Education Requirements

Bachelor’s degree in electrical engineering, computer engineering, or computer science is required.