SMTS Verification Engineering

Role Summary

The SMTS Verification Engineer will be responsible for developing verification methodologies and testbenches for Rambus’ cutting-edge semiconductor technologies. The engineer will work with cross-functional teams to ensure the correctness of designs through simulation and hardware validation.

Experience Level

This position is for experienced engineers with a solid background in verification processes and methodologies.

Responsibilities

• Develop and implement verification environments and testbenches.
• Collaborate with design engineers to define verification requirements.
• Perform simulation, debug issues, and provide support to the team.
• Contribute to the development of verification methodologies and tools.
• Participate in design reviews and provide feedback.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or related field.
• Strong knowledge of verification methodologies (UVM, SystemVerilog).
• Experience with scripting languages such as Python or Perl.
• Excellent problem-solving skills and attention to detail.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or related field.